Codsiga Oscillators Kala Duwan ee Sare -Xwaaraha FPGAs

Codsiga Oscillators Kala Duwan ee Sare -Xwaaraha FPGAs

Oscillators kala duwani waxay leeyihiin codsiyo aad muhiim u ah oo leh nashqadaha xawaaraha FPGA ee -, gaar ahaan nidaamyada leh shuruudaha sare ee saxnaanta saacada, ka hortagga{1}}awood faragelinta, iyo hufnaanta calaamadaha, sida:

Xawaaraha sare - Isku-xidhka xidhiidhinta xawaaraha sare (PCIe, SFP+/QSFP, 10G Ethernet, DDR4/DDR5)

Nidaamyada helitaanka xogta kanaalka badan-

Nidaamyada isgaarsiinta xawaaraha sare - (SerDes)

Nidaamyada wada shaqaynta saxda ah (timestamping, ADC/DAC wadista)

Waa maxay Oscillator ka duwan?

Kala duwanaanshaha Oscillator waa oscillator-ka firfircoon ee soo saara calaamadaha kala duwan (sida LVDS, LVPECL, HCSL), soo saara laba calaamadood oo saacad ah (CLK+ iyo CLK-) kuwaas oo midba midka kale u rogo. Waxay ka duwan tahay hal-abuurka caadiga ah - oscillators-dhamaaday (tusaale, CMOS{5}}Oscillators-ka wax soo saarka).

Faa'iidooyinka Calaamadaha Kala Duwan:

Codsiga Oscillators Kala Duwan ee Sare -Xwaaraha FPGAs

U adeega sida saacad tixraac ah oo loogu talagalay Interfaces-xawaaraha sare -

Xawaaraha sare - is dhex galka xawaaraha sare sida PCIe, 10G/25G Ethernet, iyo SATA waa in ay isticmaalaan saacado tixraacyo kala duwan;

100 MHz ama 156.25 MHz oscillators kala duwan (tusaale, wax soo saarka HCSL/LVDS) ayaa caadi ahaan la isticmaalaa;

Xawaare sare {{0}Module transceiver (Transceivers) sida GTX/GTH/GTP gudaha FPGAs waxay u baahan yihiin saacadahan tixraaca kala duwan.

✅ Xiriirinta Caadiga ah:

Kala duwanaanshaha Oscillator → FPGA GTREFCLK0/1 (sare{2}} biinanka tixraaca saacada gudbinta xawaaraha)

Isha Clock Core ee Clock Tree

Nidaamyada xawaaraha badan ee - kanaalka sare -, oscillator kala duwani waxa uu wadaa jajab qaybinta saacada (tusaale, SI5341/AD9528), kaas oo soo saara saacado badan oo isku xidhan;

Ku habboon toosinta saacadaha badan {{0}ADC, DAC, iyo isgaarsiinta FPGA.

✅ Qaab dhismeedka:

Oscillator Kala Duwan → Chip Maareynta Saacadda (tusaale, PLL / Fanout Buffer)

↓

Saacado isku xidhan oo badan → FPGA/ADC/DAC

Wadista FPGA Gudaha PLL/MMCM

Oscillators-ka kala duwani waxa uu bixin karaa --galiyayaal tayo sare leh (tusaale, gelitaanka FPGA iyada oo loo marayo interface IBUFDS), iyo PLL/MMCM gudaha ka dib waxay soo saartaa saacadaha module kasta; Tani waxay hagaajinaysaa tayada saacadda waxayna yaraynaysaa guud ahaan saacada nidaamka.

Noocyada Wax-soo-saarka Kala Duwan ee Caadiga ah iyo Waafaqsanaanta FPGA

✔ Waxaa lagu talinayaa in la isticmaalo nooc wax-soo-saar kala duwanaansho ah oo ku habboon sida uu ku taliyay soo saaraha FPGA.

Talooyinka Xulashada Oscillator Kala Duwan

Mudnaanta sii borotokoolka - soo noqnoqoshada lagu taliyay:

PCIe: 100 MHz;

SFP +/10G Ethernet: 156.25 MHz;

25G/40G Ethernet: 312.5 MHz;

JESD204B/C: 250 MHz, 312.5 MHz, 625 MHz, iwm.

Tixraac saacadaha lagu taliyey ee ku jira dukumeentiyada FPGA ee rasmiga ah;

Jitter hoose waa muhiim:

RMS jitter <0.5 ps (loo baahan yahay -xawaaraha sare);

Gaar ahaan muhiim u ah PCIe, JESD204C, iyo 10G/25G Ethernet.

✅ Soo noqnoqoshada Caadiga ah ee Oscillators Kala Duwan ee Sare -Xwaaraha FPGAs

✔ Noocyo gaar ah, waxaa lagu talinayaa in aad la xiriirto iibka Hangjing ama injineerada farsamada si aad u hesho talobixin la mid ah wax soo saarka kala duwan.

Soo koobid

Oscillator-yada kala duwani waxay ku dhow yihiin qayb ka mid ah nidaamka sare ee casriga ah -xawaaraha FPGA nidaamyada waana aaladaha muhiimka ah ee hubinaya -isgaarsiinta xawaaraha sare iyo waxqabadka isku xidhka nidaamka.

Haddii aad haysato nooc gaar ah oo FPGA ah (sida Xilinx Zynq Ultrascale+, Intel Stratix 10), moodeel oscillator kala duwan, ama shuruudo isgaarsiineed (sida PCIe Gen3/SFP+), Suzhou Hangjing ayaa kaa caawin kara inaad ku taliso nidaamka qaabeynta saacada ugu habboon iyo naqshadaynta isku xirka.